ADT7518
Rev. A | Page 25 of 40
5. Place 0.1 礔 bypass and 2,200 pF input filter capacitors
close to the ADT7518.
6. If the distance to the remote sensor is more than 8 inches,
the use of twisted-pair cable is recommended. This will
work up to about 6 feet to 12 feet.
7. For long distances (up to 100 feet), use shielded twisted-
pair cable, such as Belden #8451 microphone cable.
Connect the twisted pair to D+ and D and the shield to
GND close to the ADT7518. Leave the remote end of the
shield unconnected to avoid ground loops.
Because the measurement technique uses switched current
sources, excessive cable and/or filter capacitance can affect the
measurement. When using long cables, the filter capacitor may
be reduced or removed.
Cable resistance can also introduce errors. Series resistance of
1 & introduces about 0.5癈 error.
Temperature Value Format
One LSB of the ADC corresponds to 0.25癈. The ADC can
theoretically measure a temperature span of 255癈. The internal
temperature sensor is guaranteed to a low value limit of 40癈.
It is possible to measure the full temperature span using the
external temperature sensor. The temperature data format is
shown in Table 9.
The result of the internal or external temperature measure-
ments is stored in the temperature value registers, and is com-
pared with limits programmed into the internal or external high
and low registers.
Table 9. Temperature Data Format (Internal and External
Temperature)
Temperature
Digital Output
40癈
11 0110 0000
25癈
11 1001 1100
10癈
11 1101 1000
0.25癈
11 1111 1111
0癈
00 0000 0000
+0.25癈
00 0000 0001
+10癈
00 0010 1000
+25癈
00 0110 0100
+50癈
00 1100 1000
+75癈
01 0010 1100
+100癈
01 1001 0000
+105癈
01 1010 0100
+125癈
01 1111 0100
Temperature Conversion Formula:
Positive Temperature = ADC Code/4
Negative Temperature = (ADC Code* 512)/4
*where DB9 is removed from the ADC code.
Interrupts
The measured results from the internal temperature sensor,
external temperature sensor, VDD pin, and AIN inputs are
compared with the THIGH/VHIGH (greater than comparison) and
TLOW/VLOW (less than or equal to comparison) limits. An inter-
rupt occurs if the measurement exceeds or equals the limit
registers. These limits are stored in on-chip registers. Note that
the limit registers are 8 bits long while the conversion results are
10 bits long. If the limits are not masked, any out-of-limit com-
parisons generate flags that are stored in the Interrupt Status 1
register (Address 00h) and Interrupt Status 2 register
(Address 01h). One or more out-of-limit results will cause the
INT/INT
output to pull either high or low depending on the
output polarity setting. It is good design practice to mask out
interrupts for channels that are of no concern to the application.
Figure 49 shows the interrupt structure for the ADT7518. It
gives a block diagram representation of how the various
measurement channels affect the INT/INT
pin.
ADT7518 REGISTERS
The ADT7518 contains registers that are used to store the
results of external and internal temperature measurements, V
DD
value measurements, analog input measurements, high and low
temperature limits, supply voltage and analog input limits, to set
output DAC voltage levels, to configure multipurpose pins, and
generally to control the device. A description of these registers
follows.
The register map is divided into registers of 8 bits. Each register
has its own individual address, but some consist of data that is
linked to other registers. These registers hold the 10-bit conver-
sion results of measurements taken on the temperature, V
DD
,
and AIN channels. For example, the eight MSBs of the VDD
measurement are stored in Register Address 06h, while the two
LSBs are stored in Register Address 03h. These types of registers
are linked such that when the LSB register is read first, the MSB
registers associated with that LSB register are locked to prevent
any updates. To unlock these MSB registers, the user has only to
read any one of them, which will have the effect of unlocking all
previously locked MSB registers. So, for the preceding example,
if Register 03h was read first, MSB Registers 06h and 07h would
be locked to prevent any updates to them. If Register 06h were
read, this register and Register 07h would be subsequently
unlocked.
LOCK ASSOCIATED
MSB REGISTERS
FIRST READ
COMMAND
LSB
REGISTER
OUTPUT
DATA
Figure 51. Phase 1 of 10-Bit Read
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